Tim Hollis received the Ph.D. degree in electrical engineering from Brigham Young University, Provo, UT, USA, in 2007.

In 2006, he joined the Advanced Architecture Group at Micron Technology in Boise, Idaho, USA where he contributed to several pathfinding activities including the first-generation Hybrid Memory Cube. From 2012 to 2014, he worked as a chipset architect at Qualcomm in San Diego, CA, USA. He returned to Micron in 2014, where he currently leads the Interface Pathfinding Group as a Micron Fellow. He has published 18 articles in journals, conference proceedings, and technical magazines, and holds 228 issued U.S. and international patents.

Dr. Hollis has been serving as a member of the IEEE Workshop on Microelectronics and Electron Devices Organizing Committee since 2010, including the General Chair in 2013. He has served on other IEEE conference committees as well as DesignCon’s Technical Program Committee from 2013 to 2015. From 2017 to 2020 he served as the Technology Editor for the IEEE Solid-State Circuits Magazine and as a Guest Editor for memory- and interface-related special issues in 2016 and 2019, respectively.